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SIGMA DELTA CONVERTERS BASICS

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By saurabhpande

INTRODUCTION

The sigma delta technique was first established in 1962 and recent technological development  make the devices practical and their uses are becoming widespread.The converters have found homes in such applications as communications systems, consumer and professional audio, industrial weight scales, and precision measurement devices. The advantage of these converters is their low cost compared to other conventional converters as well as their flexibility in converting low bandwidth signals


Types of Analog to Digital Converters

The basic four analog to digital converters are PIPELINE ADC, SUCCESSIVE APPROXIMATION ADC, FLASH ADC and OVER-SAMPLING ADC. Out of the four ADC's the first three are known as NYQUIST RATE CONVERTERS and the sigma delta analog to digital conversion technique falls under the oversampling converters.

So, in all these ADC'S are classified as

  1. Nyquist rate converters - In this, nyquist frequency is kept approximately 2 times the maximum frequency.
  2. Over sampling converters - As the name suggests in this the sampling is done at a very high frequency.

Why to use Sigma delta Convereter

There are some disadvantages regarding Nyquist rate converters which allows to use the oversampling technique.

  1. They do not use make use of exceptionally high speed which can easily acheived by VLSI technique.
  2. Low pass filter used to limit input frequency is complicated.
  3. Sample and hold circuitry is complicated.
  4. It requires an anti-aliasing filter which makes circuitry more complex.



Referred Books

CMOS Circuit Design, Layout, and Simulation, Revised Second Edition CMOS Circuit Design, Layout, and Simulation, Revised Second Edition
Price: $58.59
List Price: $121.95
Principles of CMOS VLSI Design Principles of CMOS VLSI Design
Price: $23.00
List Price: $69.00
Understanding Delta-Sigma Data Converters Understanding Delta-Sigma Data Converters
Price: $91.93
List Price: $118.50

Firt order sigma delta converter

The basic function of sigma delta converter is to make rough evaluations of the signal, to measure the error, integrate it and then compensate for that error.

Working

1              The analog signal will make the first op amp, which is a summing integrator, to create a saw tooth waveform proportional to the analog signal voltage.

2              This saw tooth waveform found on the integrator output is then compared with zero volts by the second op amp, which is a comparator.

3              It can be considered a 1-bit ADC, since its output will have only two states, high or low, depending whether the integrator output is positive or negative.

4              The comparator output is stored on the D-type flip-flop, which is a one-bit static memory. This flip-flop is clocked at a very high frequency.

5              Then the flip-flop output is used to feedback the circuit through a one-bit DAC.

6              This one-bit DAC will basically convert the “0” or “1” stored at the flip-flop into a positive or negative reference voltage to be added to the input of the summing integrator.

7              So the summing integrator will sum the next sample with the result of the previous sample (a positive or a negative voltage), aiming to maintain zero at the integrator output.

8              The result is that at the flip-flop output we will have a series of zeros and ones that corresponds to the sampled data.

9              The bit stream average level represents the analog input signal average voltage.

10          Since the clock rate used at the flip-flop is very high, data is sampled many times over, a technique known as oversampling.

11          The higher the clock, the higher the precision of the sigma-delta ADC.

12          In real-world applications, the flip-flop clock rate will be 64 times higher than the sampling rate (i.e., a oversampling rate of 64). So, for a 44,100 Hz sampling rate, the flip-flop clock rate will be of 2,822,400 Hz.

Output

COMPARATOR AND OUTPUT

Comparator Design using S-Edit tool of Tanner EDA.
Comparator Design using S-Edit tool of Tanner EDA.
Output Waveform using W-Edit tool
Output Waveform using W-Edit tool

1              The waveforms of  i/p and o/p for a first-order Σ−∆ modulator are illustrated in Figure.

2              In each clock cycle, the value of the output of the modulator is either plus or minus full scale, according to the results of the 1-bit A/D conversion.

3              A run consisting of all 1s would correspond to the maximum (positive) amplitude value and vice versa.

4              Alternating 1s and 0s would correspond to a zero amplitude value.

5              ΔΣ modulator actually uses the concept of pulse density modulation.

6              In this the density of the pulses represents the average value of the signal over the specific period.

7              Here we can also see that Nyquist rate converters would take only two samples but the oversampling converterstakes hundreds of samples over same period to produce pulse density signal.


Decimation process

There are two basic blocks of any sigma delta converter. The first one is the analog modulator which is discussed above and the second is the decimation.

Decimation - In simple words, decimation is the process of reducing the  sampling rate usually implying low pass filter. Downsampling is the more practical term which means throwing away the samples without the filtering section.

Decimation process is done to provide the systems which operate at relatively low frequency a high resolution signal which is the output of analog modulator of the sigma delta converter.


Advantages

1              Σ−∆ A/D converters use a low resolution A/D converter (1-bit quantizer).

2              The high resolution can be achieved.

3              Less circuitry as compared to Nyquist rate converters.

4              As the sampling rate is very high, ALIASING is not a serious problem

5              Low power requirement as compared to others.

6              Noise is significantly reduced.

Disadvantages

1 One of the drawbacks of the sigma-delta modulators is the need for oversampling.

2 Demanding great complexity of the digital circuitry

3 If the sampling rate is too high, the output quality will be close to perfection, but you will need   a lot of storage space to hold the generated data & if the sampling rate is too low, the output     quality will be bad.

4 The penalty paid for the high resolution achievable with sigma-delta technology has always       been speed.

5 This method is limited by the frequency constraint of sigma-delta ADCs.

6 For high input signals, the converter tends to become unstable.

Do not forget that we are discussing the 1st order converter. As we move on towards the higher order converters these drawbacks gets eliminated although circuitry will increase.

Implimentation

In order to realize this circuit using VLSI technology TANNER EDA tool can be used. This is a very good tool but one needs to have a sufficient knowledge of VLSI basics. This tool comprises of the features of designing such as simulation, layout, waveforms etc. One such realization of a comparator circuit which i have generated using this tool can be seen in adjoint figure.

The various books which can be used for reference are

1 Principles of Sigma-Delta Modulation for Analog-to-Digital Converters by SangilPark.

2 CMOS Circuit Design Layout and Simulation by Baker - Li – Boyce

3 Principles of CMOS VLSI DESIGN BY NEIL H.E. WESTE AND KAMRAN ESHRAGHIAN



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