# Top 5 interview questions regarding logic IC's

Updated on June 27, 2014

## Gate IC's Terminologies

1. PROPOGATION DELAY

Amount of time lapse during propagation of a pulse through a gate from input to output. It is the time delay taken by the head of the signal to travel through the gate.The average transition delay time expressed by:

tpd = (tplh+ tphl) /2

Where,

tplh - signal delay time when output goes from a logic 0 to logic 1 state

tlph - signal delay time when output goes from a logic 0 to logic 1 state

The difference in propagation delays of logic elements is the major contributor to glitches in asynchronous circuits as a result of race conditions.Propagation delay increases with operating temperature, marginal supply voltage as well as an increased output load capacitance. Wires have an approximate propagation delay of 1 ns for every 6 inches (15 cm) of length. Logic gates can have propagation delays ranging from more than 10 ns down to the picosecond range, depending on the technology being used. If the output of a logic gate has many fanouts, the propagation delay will increase substantially.

2. POWER DISSIPATION

Power required by the gate to operate with 50% duty cycle at a specified frequency and is expressed in milliwatts. (i.e. 1 & 0 periods of output are equal).

Pd = vcc * icc(avg) /n

vcc - gate supply voltage

icc (avg) - average current drawn from supply by entire IC

n - no. of gates in the IC

icc(avg) = (icch + iccl)/2

icch - current drawn by IC when all gates are in high state

iccl - current drawn by IC when all gates are in low state

Total power dissipation consumed by an IC is equal to the product of power dissipated by each gate and no. of gates in that IC.

Power dissipation due to CMOS gates:

Static CMOS gates are very power efficient because they dissipate nearly zero power while idle. For much of the history counts and clock frequencies have increased, power consumption has skyrocketed and now is a primary design constraint. The instantaneous power P(t) drawn from the power supply is proportional to the supply current iDD(t) and the supply voltage VDD

P(t) = iDD(t) VDD

The energy consumed over some time interval T is the integral of the instantaneous power

E = ∫iDD (t)VDDdt

Power dissipation in CMOS circuits come from two components

1. Static dissipation due to
• Subthreshold conduction through OFF transistors
• Tunneling current through gate oxide
• Leakage through reverse biased diodes
• Contention current in ratioed circuit

2.Dynamic dissipation due to

• Charging and discharging of load capacitances
• "Short circuit" current while both pMOS and nMOS networks are partially ON

Ptotal = Pstatic + Pdynamic

3.NOISE MARGIN

It is closely related to the DC voltage characteristics. This parameter allows you to determine the allowable noise voltage on the input of a gate so that the output will not be corrupted. The specification most commonly used to describe noise margin (or noise immunity) uses two parameters: the LOW noise margin, NML, and the HIGH noise margin NMH. NML is defined as the difference in maximum LOW input voltage recognized by the receiving gate and the maximum LOW output voltage produced by the driving gate.

NML = VIL - VOL

The value of NMH is the difference between the minimum HIGH output voltage of the driving gate and the minimum HIGH input voltage recognized by the receiving gate. Thus

NMH = VOH - VIH

where

VIH = minimum HIGH input voltage

VIL = maximum LOW input voltage

VOH = minimum HIGH output voltage

VOL = maximum LOW output voltage

4. OPERATING TEMPERATURE

An operating temperature is a temperature at which a device operates. The device will operate effectively within a specified temperature range based on its various application of the device.Outside this range of safe operating temperatures the device may fail. These are the ambient temperature ranges for parts specified to commercial, industrial, military and for automotive standards. Parts must operate at the bottom end of the ambient range unless they are allowed time to warm up before use. The junction temperature significantly exceed the maximum ambient temperature. Commonly commercial parts are verified to operate with junction temperatures up to 110°c to 125°c.

For commercial applications : 0°c to 70° c

For military applications : -55°c to 125°c

For industrial applications : 0°c to 85°c

For automotive applications: -45°c to 125°c

5.VOLTAGE AND CURRENT PARAMETERS

1. VIH(min) - HIGH level input voltage
2. VOH(min) - HIGH level output voltage
3. VIL(max) - LOW level input voltage
4. VOL(max) - LOW level output voltage
5. IIH - HIGH level input current
6. IIL - LOW level input current
7. IOH - HIGH level output current

5

3

20